JPS6239792B2 - - Google Patents

Info

Publication number
JPS6239792B2
JPS6239792B2 JP56050372A JP5037281A JPS6239792B2 JP S6239792 B2 JPS6239792 B2 JP S6239792B2 JP 56050372 A JP56050372 A JP 56050372A JP 5037281 A JP5037281 A JP 5037281A JP S6239792 B2 JPS6239792 B2 JP S6239792B2
Authority
JP
Japan
Prior art keywords
processors
control circuit
data
signals
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56050372A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57164362A (en
Inventor
Kenichi Ueda
Atsushi Sugano
Kunio Pponda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56050372A priority Critical patent/JPS57164362A/ja
Publication of JPS57164362A publication Critical patent/JPS57164362A/ja
Publication of JPS6239792B2 publication Critical patent/JPS6239792B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP56050372A 1981-04-02 1981-04-02 Debugging device in multi-processor system Granted JPS57164362A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56050372A JPS57164362A (en) 1981-04-02 1981-04-02 Debugging device in multi-processor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56050372A JPS57164362A (en) 1981-04-02 1981-04-02 Debugging device in multi-processor system

Publications (2)

Publication Number Publication Date
JPS57164362A JPS57164362A (en) 1982-10-08
JPS6239792B2 true JPS6239792B2 (en]) 1987-08-25

Family

ID=12857050

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56050372A Granted JPS57164362A (en) 1981-04-02 1981-04-02 Debugging device in multi-processor system

Country Status (1)

Country Link
JP (1) JPS57164362A (en])

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61282937A (ja) * 1985-06-07 1986-12-13 Matsushita Electric Ind Co Ltd 情報処理装置
JP2771979B2 (ja) * 1987-11-30 1998-07-02 株式会社東芝 並列処理方法
JP2010117813A (ja) * 2008-11-12 2010-05-27 Nec Electronics Corp デバッグシステム、デバッグ方法、デバッグ制御方法及びデバッグ制御プログラム
US8112677B2 (en) 2010-02-26 2012-02-07 UltraSoC Technologies Limited Method of debugging multiple processes

Also Published As

Publication number Publication date
JPS57164362A (en) 1982-10-08

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